The present invention relates to fabrication of semiconductor integrated circuits.
In an application in which trimming of precise circuit characteristics is necessary, fuse links are commonly placed on integrated circuit (IC) chips. A predetermined algorithm based upon the circuit""s behavior under nominal processing conditions is used to determine the appropriate fuse links to be xe2x80x9cblownxe2x80x9dor opened to adjust the circuit parameters accordingly.
For example, U.S. Pat. No. 5,991,220 to Freyman et al., which is expressly incorporated by reference herein in its entirety, describes an apparatus for selectively controlling a plurality of fuses associated with an IC. Each fuse is switchable from a closed state to an open state. The apparatus has a data register including an array of internal registers. Each of the internal registers is coupled with one of the fuses. Each internal register is identified by an address and is separately addressable. An instruction register contains instructions for determining whether the fuses are to assume the opened state or the closed state. A controller connects the data register and the instruction register. The controller combines with the data register to cause the fuses associated with the internal registers to assume the states determined by the instruction register.
Programming buried metal fuses is not without difficulties. For example, the state of each fuse (i.e., xe2x80x9copenedxe2x80x9dor xe2x80x9cclosedxe2x80x9d) is generally serially established (one at a time), which is time consuming. The total amount of time required to blow all of the required fuses may be significant. Large arrays of metal fuses, such as those used to store encryption keys or serial numbers, can take a long time to program.
A method of reducing the time required to configure the fuses is desired.
Another problem inherent with buried metal fuses is their reliability. A programmed fuse is less reliable than an intact fuse, because environmental factors, such as moisture can degrade a programmed fuse severely enough to cause the fuse to be detected as intact, even after the fuse is blown. Also, in some instances, if the line width of a given fuse is too great (i.e., its resistance is too low), then an amount of power normally sufficient to blow a nominally dimensioned fuse may not be sufficient to blow that given fuse. If it is necessary for that given fuse to be opened to trim the circuitry, but the fuse is detected as being closed, the IC is normally not usable.
A method of salvaging IC""s which have defective buried metal fuses is desired.
One aspect of the present invention is a method for handling outputs from a plurality of fuses coupled to a semiconductor device. Each fuse has an output state. The plurality of fuses are divided into first and second subsets of the plurality of fuses, such that the fuses in the first subset are to be blown and the fuses in the second subset are to remain intact. A determination is made as to whether a number of fuses in the first subset is greater than half of a total number of fuses in the plurality of fuses. The output state of each of the plurality of fuses is inverted, and each fuse in the second subset is blown, if the number of fuses in the first subset is greater than half of the total number of fuses.
Another aspect of the invention is a method for handling outputs from a plurality of fuses coupled to a semiconductor device. Each fuse has an output state. The plurality of fuses are divided into first and second subsets of the plurality of fuses, such that the fuses in the first subset are to be blown and the fuses in the second subset are to remain intact. A determination is made as to whether any of the fuses in the first subset have a defect that causes that fuse to be detected as intact when blown. The output state of each of the plurality of fuses is inverted and each fuse in the second subset is blown, if any of the first subset of fuses has the defect.
Another aspect of the invention is a semiconductor device including a plurality of fuses and an apparatus for selectively handling the outputs of the plurality of fuses. Each fuse has an output state. The apparatus includes a plurality of latches, each latch coupled to an output of a respective one of the plurality of fuses. An encoding fuse is coupled to each of the plurality of latches. The encoding fuse has a first state in which each of the plurality of latches has an output that is the same as the state of the respective one of the plurality of fuses to which that latch is coupled. The encoding fuse has a second state in which each of the plurality of latches has an output that is opposite the state of the respective one of the plurality of fuses to which that latch is coupled.